Coverart for item
The Resource Reliability of RoHS-Compliant 2D and 3D IC interconnects, John H. Lau

Reliability of RoHS-Compliant 2D and 3D IC interconnects, John H. Lau

Label
Reliability of RoHS-Compliant 2D and 3D IC interconnects
Title
Reliability of RoHS-Compliant 2D and 3D IC interconnects
Statement of responsibility
John H. Lau
Creator
Subject
Language
eng
Summary
  • "Unique global coverage of RoHS-compliant materials for electronics manufacturing and for packaging assembly and semiconductor integration Reliability of RoHS-Compliant 2D and 3D IC Interconnects provides comprehensive details on RoHS-compliant electronics packaging solder interconnects. This authoritative guide aids in developing innovative, high-performance, cost-effective, and reliable lead-free interconnects for electronics and optoelectronic products. Reliability of RoHS-Compliant 2D and 3D IC Interconnects Covers chip-level interconnect reliability, first- and second-level interconnect reliability, and 3D IC integration interconnect reliability Addresses challenging problems created by increasing interest in lead-free interconnect reliability of 3D packaging and 3D IC integration Provides information fundamental to research and development of design (mechanical, optical, electrical, and thermal); materials; process; manufacturing; testing; and reliability for lead-free interconnects in RoHS-compliant electronics products Removes road blocks to, avoids unnecessary false starts in, and accelerates design, materials, and process development in packaging technology In-depth details: Introduction to RoHS Compliant Semiconductor and Packaging Technologies; Reliability Engineering of Lead-Free Interconnects; Notes on Failure Criterion; Reliability of 1657-Pin CCGA Lead-Free Solder Joints; Reliability of PBGA Lead-Free Solder Joints; Reliability of LED Lead-Free Interconnects; Reliability of VCSEL Lead-Free Interconnects; Reliability of Low-Temperature Lead-Free (SnBiAg) Solder Joints; Reliability of Lead-Free (SACX) Solder Joints; Chip-to-Wafer (C2W) Lead-Free Interconnect Reliability; Wafer-to-Wafer (W2W) Lead-Free Interconnect Reliability; Through-Silicon-Via (TSV) Interposer Lead-Free Interconnect Reliability; Electromigration of Lead-Free Microbumps for 3D IC Integrations; Effects of Dwell-Time and Ramp-Rates on SAC Thermal Cycling Test Results; Effects of High Strain Rate (Impact) on SAC Solder Bumps; Effects of Voids on Solder Joints Reliability"--
  • "Reliability of RoHS-Compliant 2D and 3D IC Interconnects provides comprehensive coverage of RoHS-compliant electronics packaging solder interconnects. RoHS--the restriction of the use of certain hazardous substances in electrical and electronic equipment--is law in the EU, China, Japan, Korea, Canada, Australia, California, etc. RoHS bans lead and five other materials; thus, in order to ship electrical products to these regions and countries, products must be lead-free. The material in this book aids in developing innovative, high-performance, cost-effective, and reliable lead-free interconnects for electronics and optoelectronic products"--
Member of
Assigning source
  • Provided by publisher
  • Provided by publisher
Cataloging source
DLC
Dewey number
621.381/046
Illustrations
illustrations
Index
index present
LC call number
TK7874.53
LC item number
.L38 2011
Literary form
non fiction
Nature of contents
bibliography
Series statement
Electronic engineering
Label
Reliability of RoHS-Compliant 2D and 3D IC interconnects, John H. Lau
Instantiates
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
volume
Carrier MARC source
rdacarrier
Content category
text
Content type MARC source
rdacontent
Contents
Machine generated contents note: Brief TOCCh 1. Introduction to RoHS Compliant Semiconductor and Packaging TechnologiesCh 2. Reliability Engineering of Lead-Free InterconnectsCh 3. Notes on Failure CriterionCh 4. Reliability of 1657-Pin CCGA Lead-Free Solder JointsCh 5. Reliability of PBGA (w/o Underfils) Lead-Free Solder JointsCh 6. Reliability of LED Lead-Free InterconnectsCh 7. Reliability of VCSEL Lead-Free InterconnectsCh 8. Reliability of Low-Temperature Lead-Free (SnBiAg) Solder JointsCh 9. Reliability of Lead-Free (SACX) Solder JointsCh 10. Chip-to-Wafer (C2W) Lead-Free Interconnect ReliabilityCh 11. Wafer-to-Wafer (W2W) Lead-Free Interconnect ReliabilityCh 12. Through-Silicon-Via (TSV) Interposer Lead-Free Interconnect ReliabilityCh 13. Electromigration of Lead-Free Microbumps for 3D IC IntegrationsCh 14. Effects of Dwell-Time and Ramp-Rates on SAC Thermal Cycling Test ResultsCh 15. Effects of High Strain Rate (Impact) on SAC Solder BumpsCh 16. Effects of Voids on Solder Joints Reliability
Dimensions
24 cm.
Extent
xxix, 606 p.
Isbn
9780071753791
Isbn Type
(hardback)
Lccn
2010040873
Media category
unmediated
Media MARC source
rdamedia
Other physical details
ill. (some col.)
System control number
  • (OCoLC)ocn659763935
  • UtOrBLW
  • (OCoLC)ocn702027422
Label
Reliability of RoHS-Compliant 2D and 3D IC interconnects, John H. Lau
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
volume
Carrier MARC source
rdacarrier
Content category
text
Content type MARC source
rdacontent
Contents
Machine generated contents note: Brief TOCCh 1. Introduction to RoHS Compliant Semiconductor and Packaging TechnologiesCh 2. Reliability Engineering of Lead-Free InterconnectsCh 3. Notes on Failure CriterionCh 4. Reliability of 1657-Pin CCGA Lead-Free Solder JointsCh 5. Reliability of PBGA (w/o Underfils) Lead-Free Solder JointsCh 6. Reliability of LED Lead-Free InterconnectsCh 7. Reliability of VCSEL Lead-Free InterconnectsCh 8. Reliability of Low-Temperature Lead-Free (SnBiAg) Solder JointsCh 9. Reliability of Lead-Free (SACX) Solder JointsCh 10. Chip-to-Wafer (C2W) Lead-Free Interconnect ReliabilityCh 11. Wafer-to-Wafer (W2W) Lead-Free Interconnect ReliabilityCh 12. Through-Silicon-Via (TSV) Interposer Lead-Free Interconnect ReliabilityCh 13. Electromigration of Lead-Free Microbumps for 3D IC IntegrationsCh 14. Effects of Dwell-Time and Ramp-Rates on SAC Thermal Cycling Test ResultsCh 15. Effects of High Strain Rate (Impact) on SAC Solder BumpsCh 16. Effects of Voids on Solder Joints Reliability
Dimensions
24 cm.
Extent
xxix, 606 p.
Isbn
9780071753791
Isbn Type
(hardback)
Lccn
2010040873
Media category
unmediated
Media MARC source
rdamedia
Other physical details
ill. (some col.)
System control number
  • (OCoLC)ocn659763935
  • UtOrBLW
  • (OCoLC)ocn702027422

Library Locations

    • Harold B. Lee Library Brigham Young University, Provo, UT, 84602, US
      40.249156 -111.649242
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